JPH0178964U - - Google Patents
Info
- Publication number
- JPH0178964U JPH0178964U JP1987175680U JP17568087U JPH0178964U JP H0178964 U JPH0178964 U JP H0178964U JP 1987175680 U JP1987175680 U JP 1987175680U JP 17568087 U JP17568087 U JP 17568087U JP H0178964 U JPH0178964 U JP H0178964U
- Authority
- JP
- Japan
- Prior art keywords
- buffer blocks
- circuit
- input buffer
- output buffer
- gate array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987175680U JPH0178964U (en]) | 1987-11-17 | 1987-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987175680U JPH0178964U (en]) | 1987-11-17 | 1987-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0178964U true JPH0178964U (en]) | 1989-05-26 |
Family
ID=31467465
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987175680U Pending JPH0178964U (en]) | 1987-11-17 | 1987-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0178964U (en]) |
-
1987
- 1987-11-17 JP JP1987175680U patent/JPH0178964U/ja active Pending